Study of Stochastic Invertible Multiplier Designs

Kaito Nishino; Sean C. Smithson; Naoya Onizawa; Brett H. Meyer; Warren J. Gross; Hitoshi Yamagata; Hiroyuki Fujita; Takahiro Hanyu

doi:10.1109/ICECS.2018.8618039

Study of Stochastic Invertible Multiplier Designs

Kaito Nishino, Sean C. Smithson, Naoya Onizawa, Brett H. Meyer, Warren J. Gross, Hitoshi Yamagata, Hiroyuki Fujita, Takahiro Hanyu

研究成果: Conference contribution

3 被引用数 (Scopus)

抄録

Invertible logic is a method of reversible computing that can propagate a circuit signal backward from outputs. For example, not only multiplication (forward operation) but also division and factorization (backward operation) can be performed by this circuit style of a single multiplier. Currently, invertible logic has been able to realize only small-scale circuits. In this paper, we design larger-scale circuits than that reported conventionally, using stochastic computing. Furthermore, we also verify the performance of invertible logic using three different multipliers.

本文言語	English
ホスト出版物のタイトル	2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018
出版社	Institute of Electrical and Electronics Engineers Inc.
ページ	649-650
ページ数	2
ISBN（電子版）	9781538695623
DOI	https://doi.org/10.1109/ICECS.2018.8618039
出版ステータス	Published - 2019 1月 17
イベント	25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018 - Bordeaux, France 継続期間: 2018 12月 9 → 2018 12月 12

出版物シリーズ

名前	2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018

Conference

Conference	25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018
国/地域	France
City	Bordeaux
Period	18/12/9 → 18/12/12

ASJC Scopus subject areas

電子工学および電気工学
器械工学

文献へのアクセス

10.1109/ICECS.2018.8618039

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引用スタイル

Nishino, K., Smithson, S. C., Onizawa, N., Meyer, B. H., Gross, W. J., Yamagata, H., Fujita, H., & Hanyu, T. (2019). Study of Stochastic Invertible Multiplier Designs. In 2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018 (pp. 649-650). [8618039] (2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICECS.2018.8618039

Study of Stochastic Invertible Multiplier Designs. / Nishino, Kaito; Smithson, Sean C.; Onizawa, Naoya その他.
2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018. Institute of Electrical and Electronics Engineers Inc., 2019. p. 649-650 8618039 (2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018).

研究成果: Conference contribution

Nishino, K, Smithson, SC, Onizawa, N, Meyer, BH, Gross, WJ, Yamagata, H, Fujita, H & Hanyu, T 2019, Study of Stochastic Invertible Multiplier Designs. in 2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018., 8618039, 2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018, Institute of Electrical and Electronics Engineers Inc., pp. 649-650, 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018, Bordeaux, France, 18/12/9. https://doi.org/10.1109/ICECS.2018.8618039

Nishino K, Smithson SC, Onizawa N, Meyer BH, Gross WJ, Yamagata H その他. Study of Stochastic Invertible Multiplier Designs. In 2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018. Institute of Electrical and Electronics Engineers Inc. 2019. p. 649-650. 8618039. (2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018). doi: 10.1109/ICECS.2018.8618039

Nishino, Kaito ; Smithson, Sean C. ; Onizawa, Naoya その他. / Study of Stochastic Invertible Multiplier Designs. 2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018. Institute of Electrical and Electronics Engineers Inc., 2019. pp. 649-650 (2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018).

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title = "Study of Stochastic Invertible Multiplier Designs",

abstract = "Invertible logic is a method of reversible computing that can propagate a circuit signal backward from outputs. For example, not only multiplication (forward operation) but also division and factorization (backward operation) can be performed by this circuit style of a single multiplier. Currently, invertible logic has been able to realize only small-scale circuits. In this paper, we design larger-scale circuits than that reported conventionally, using stochastic computing. Furthermore, we also verify the performance of invertible logic using three different multipliers.",

keywords = "Bidirectional computation, Factorization, Hamiltonian, Multiplier, Stochastic computing",

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note = "Publisher Copyright: {\textcopyright} 2018 IEEE. Copyright: Copyright 2019 Elsevier B.V., All rights reserved.; 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018 ; Conference date: 09-12-2018 Through 12-12-2018",

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AU - Fujita, Hiroyuki

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Study of Stochastic Invertible Multiplier Designs

抄録

出版物シリーズ

Conference

ASJC Scopus subject areas

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