Tunnel-FETs (TFETs) and MOSFETs are fabricated on a single SOI substrate using the same device parameters and process conditions, and the variation behavior of TFETs is studied by highlighting the difference with MOSFETs. It is found that the variation behavior characteristic to TFET is mainly caused by two factors. One is the dopant concentration at source region. It seems to affect to the uniformity of tunneling current along the channel width. A heavier source concentration is necessary to suppress the variation. Another factor is the channel edge configuration. Electric fields are easily concentrated at channel edge regions, and it lowers the threshold voltage of TFETs locally. It brings about an asymmetric variation behavior. Suppression of these factors is indispensable for the integration of TFET circuits.